Program
- Program time plan: Download here (pdf).
- Condensed and clickable program here.
- Detailed program here.
Invited speakers (confirmed)
| Speaker | Topic |
|---|---|
| M. Camarda (CNR-IMM, Italy) | "Simulation of SiC epitaxial growth and defect generation" |
| A.Gali (BME, Hungary) | "Defects in SiC; theory" |
| P.Godignon (CNM-CSIC, Spain) | "Reliability of SiC diodes at high temperature: device, package and test methodology" |
| T. Kimoto (Kyoto University, Japan) | "SiC epi-layers; growth and defects" |
| M. R. Kumar (Denso Corp., Japan) | "Progress in SiC power switch development" |
| K. Matocha (GE, USA) | "MOSFET performance and characterization of the related interfaces" |
| J. Palmour (Cree Inc., USA) | "Energy saving by SiC" - plenary talk |
| B. Pichaud (Univ. Paul Cézanne, France) | "Characterization of BPD’s and SF’s in SiC" |
| V. Raineri (CNR - IMM, Italy) | "The graphene / SiC interface and local transport properties" |
| A. Schöner (ACREO, Sweden) | "SiC devices on different polytypes; perspectives and challenges" |
| T. Undeland (NTNU / SINTEF, Norway) | "Energy systems and new technologies for efficient power transmission" - plenary talk |
Condensed program (click a session to see details)
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Detailed program
(Invited speakers in bold face)
Monday
| Mo1 - Plenary SessionTo condensed program. | ||
|---|---|---|
| Time | Authors | Title |
| 09:20 | J.W. Palmour | SiC Power devices for energy efficiency |
| 10:00 | T. Undeland | Energy systems and new technologies for efficient power transmission |
| Mo2 - High Temperature OperationTo condensed program. | ||
|---|---|---|
| Time | Authors | Title |
| 11:10 | P. Neudeck | Low Earth Orbit Space Environment Testing of Extreme Temperature 6H-SiC JFETs on the International Space Station |
| 11:30 | R. Thompson | High Temperature Silicon Carbide CMOS Integrated Circuits |
| 11:50 | Z. Stum | 300°C Silicon Carbide Integrated Circuits |
| 12:10 | M. Le-Huu | 4H-SiC n-MOSFET Logic Circuits for High Temperature Operation |
| 12:30 | M. Domeij | 1200 V SiC BJTs with low VCESAT and high temperature capability |
| 12:50 | - | Presentation of invited posters |
| Mo3 - Surfaces and InterfacesTo condensed program. | ||
|---|---|---|
| Time | Authors | Title |
| 16:00 | K. Matocha | Understanding the inversion-layer properties of the 4H-SiC/SiO2 interface |
| 16:30 | I. Pintilie | The influence of excess nitrogen, on the electrical properties of the 4H-SiC/SiO2 interface |
| 16:50 | T. Hatakeyama | Microscopic Examination of SiO2/4H-SiC Interfaces |
| 17:10 | S. Kotake | Improved MOS interface properties of C-face 4H-SiC by POCl3 annealing |
| 17:30 | E. Sveinbjörnsson | Reduction in the density of interface states at the SiO2/4H-SiC interface after dry oxidation in the presence of potassium |
| 17:50 | Y. Hijikata | Theoretical studies for Si and C emission into SiC layer during oxidation |
Tuesday
| Tue1 - Bulk and epitaxial growthTo condensed program. | ||
|---|---|---|
| Time | Authors | Title |
| 08:30 | T. Kimoto | SiC epi-layers; growth and defects |
| 09:00 | B. Kallinger | 4H-SiC Homoepitaxial Growth on Substrates with Different Off-cut Directions |
| 09:20 | S. Leone | Chloride-based CVD at high rates of 4H-SiC on-axis epitaxial layers for power devices |
| 09:40 | B. Gao | Numerical simulation of a new SiC growth system by the dual-directional |
| 10:00 | I. Sandulache | Improvement of the Continuous Feed-Physical Vapor Transport technique (CF-PVT) with a baffle design |
| Tue2 - Growth and defectsTo condensed program. | ||
|---|---|---|
| Time | Authors | Title |
| 10:50 | M. Camarda | Simulation of SiC epitaxial growth and defect generation |
| 11:20 | V. Wheeler | Effects of nitrogen doping on basal plane dislocations in 8 deg. off-cut |
| 11:40 | K. Kojima | Reducing stacking faults with highly doped n-type 4H-SiC crystal |
| 12:00 | A. Canino | Single Shokley faults surface density reduction by TCS growth process |
| 12:20 | G. Ferro | On the mechanism of twin boundary elimination in 3C-SiC(111) heteroepitaxial layers on α-SiC substrates |
| Tue3 - Power switchingTo condensed program. | ||
|---|---|---|
| Time | Authors | Title |
| 15:40 | D. Sheridan | Low Switching Energy 1200V Normally-Off SiC VJFET Power Modules |
| 16:00 | F. Björk | 1200V SiC JFET in Cascode Light configuration: comparison versus Si and SiC based switches |
| 16:20 | N. Dheilly | Optical triggering of 4H-SiC thyristors with 365 nm UV LED |
| 16:40 | V. Veliadis | 600-V symmetrical bi-directional power switching using SiC vertical-channel JFETs with efficient edge termination |
| 17:00 | S. Sato | Forced-Air-Cooled 10 kW Three-Phase SiC Inverter with an Output Power Density of more than 20 kW/L |
| Industrial SessionTo condensed program. | ||
|---|---|---|
| Time | ||
| 19:00- | ||
Wednesday
| We1 - Characterization ITo condensed program. | ||
|---|---|---|
| Time | Authors | Title |
| 08:30 | A. Gali | Defects in SiC; theory |
| 09:00 | P. Carlsson | The Vc-CsiVc defect model for the EI4 EPR center in 4H- and 6H-SiC |
| 09:20 | L. Løvlie | Enhanced annealing of MeV ion implantation damage in n-type 4H silicon carbide by thermal oxidation |
| 09:40 | T. Hayashi | Impacts of Thermal Oxidation and Surface Passivation on Carrier Lifetimes in p-type and n-type 4H-SiC Epilayers |
| 10:00 | R. Devaty | Using Intrinsic Defect Spectra in 4H SiC as Imbedded Thermometers in the Temperature Range from 100C to 1500C |
| We2 - Characterization IITo condensed program. | ||
|---|---|---|
| Time | Authors | Title |
| 10:50 | B. Pichaud | Characterization of BPD’s and SF’s in SiC |
| 11:20 | M. Dudley | Fomation Mechanism of Stacking Faults in PVT 4H-SiC Created by Deflection of Threading Dislocations with Burgers Vector c+a |
| 11:40 | J. Eriksson | Electrically active defects in 3C-SiC and their effect on Schottky contacts |
| 12:00 | T. Umeda | Electrically detected ESR study of interface defects in 4H-SiC MOSFETs |
| 12:20 | R. Anzalone | Advanced stress analysis by micro-structures realization on high quality hetero-epitaxial 3C-SiC for MEMS application |
| We3 - Hetero-materialsTo condensed program. | ||
|---|---|---|
| Time | Authors | Title |
| 15:40 | V. Raineri | The graphene / SiC interface and local transport properties |
| 16:10 | S. Watcharinyanon | Hydrogen intercalation of graphene grown on 6H-SiC(0001) |
| 16:30 | S. Ushio | The formation of an epitaxial-graphene cap layer for post-implantation high temperature annealing of SiC and its in situ removal by Si-vapor etching |
| 16:50 | K. Emtsev | Electronic and structural decoupling of epitaxial graphene from SiC(0001) surface by a germanium buffer layer |
| 17:10 | A. Henry | Chloride-based CVD of 3C-SiC on (0001) α-SiC substrates |
| 17:30 | M. Zielinski | Analytical model of stress relaxation in 3C SiC layers on silicon |
Thursday
| Thu1 - ProcessingTo condensed program. | ||
|---|---|---|
| Time | Authors | Title |
| 08:30 | A. Schöner | SiC devices on different polytypes; perspectives and challenges |
| 09:00 | R. Nipoti | Improving doping efficiency of Al+ and P+ implanted ions in 4H-SiC |
| 09:20 | Y. Nanen | Effects of NO Annealing on 4H-SiC MOSFETs with Deposited and Thermally Grown Oxides Fabricated on Various Crystal Faces |
| 09:40 | H. Naik | Comparison of Inversion Electron Transport Properties of (0001) 4H and 6H-SiC MOSFETs |
| 10:00 | J. Lorenzzi | Growth and preparation of 3C-SiC(111) for MOS application |
| Thu2 - DiodesTo condensed program. | ||
|---|---|---|
| Time | Authors | Title |
| 10:50 | P. Godignon | Reliability of SiC diodes at high temperature: device, package and test methodology |
| 11:20 | D. Peters | An Experimental Study of High Voltage SiC PiN Diode Modules |
| 11:40 | H. Fujiwara | Reverse Electrical Characteristics of 4H-SiC JBS Diodes Fabricated on In-House Substrate with Low Threading Dislocation Density |
| 12:00 | K. Nakayama | Component Technologies for Ultra-High-Voltage 4H-SiC pin Diode |
| 12:20 | R. Gerlach | Thermal management versus full isolation: Trade off in packaging technologies of modern SiC Diodes |
| Thu3 - SwitchesTo condensed program. | ||
|---|---|---|
| Time | Authors | Title |
| 13:40 | M. R. Kumar | Progress in SiC power switch development |
| 14:10 | H. Miyake | Improved Current Gain in 4H-SiC BJTs Passivated with Deposited Oxides Followed by Nitridation |
| 14:30 | A. Lelis | High-Temperature Reliability of SiC Power MOSFETs |
| 14:50 | B. Buono | Current Gain Degradation in 4H-SiC Power Bipolar Junction Transistors |
| 15:10 | H. Yano | Instability of 4H-SiC MOSFET characteristics due to interface traps with long time constant |
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